/*
 * Copyright (c) 2006-2018, RT-Thread Development Team
 *
 * SPDX-License-Identifier: Apache-2.0
 *
 * Change Logs:
 * Date           Author       Notes
 */

#include <rthw.h>
#include <rtthread.h>

#include <port.h>
#include "board.h"
#include "drv_uart.h"

#include "encoding.h"
#include "fpioa.h"
#include "dmac.h"

#include "uarths.h"

extern void rt_hw_ipi_send(int ipi_vector, unsigned int cpu_mask);

void rt_hw_console_output(const char *str)
{
    uarths_puts(str);
    return ;
}

void init_bss(void)
{
    unsigned int *dst;

    dst = &__bss_start;
    while (dst < &__bss_end)
    {
        *dst++ = 0;
    }
}

void cpu_entry(int cpuid)
{
    extern void entry(void);

    /* disable global interrupt */
    rt_hw_interrupt_disable();
    if (cpuid == 0)
    {
        init_bss();
        entry();
    }
    else
    {
	while(1){
            asm volatile("wfi") ;
	}
    }
}

#include <clint.h>
#include <sysctl.h>

int freq(void)
{
    rt_uint64_t value = 0;

    // value = sysctl_get_freq();
    // rt_kprintf("SYS : %d\n", value);

    value = sysctl_clock_get_freq(SYSCTL_CLOCK_PLL0);
    rt_kprintf("PLL0: %d\n", value);
    value = sysctl_clock_get_freq(SYSCTL_CLOCK_PLL1);
    rt_kprintf("PLL1: %d\n", value);
    value = sysctl_clock_get_freq(SYSCTL_CLOCK_PLL2);
    rt_kprintf("PLL2: %d\n", value);
    value = sysctl_clock_get_freq(SYSCTL_CLOCK_CPU);
    rt_kprintf("CPU : %d\n", value);
    value = sysctl_clock_get_freq(SYSCTL_CLOCK_APB0);
    rt_kprintf("APB0: %d\n", value);
    value = sysctl_clock_get_freq(SYSCTL_CLOCK_APB1);
    rt_kprintf("APB1: %d\n", value);
    value = sysctl_clock_get_freq(SYSCTL_CLOCK_APB2);
    rt_kprintf("APB2: %d\n", value);
    value = sysctl_clock_get_freq(SYSCTL_CLOCK_HCLK);
    rt_kprintf("HCLK: %d\n", value);

    value = clint_get_time();
    rt_kprintf("mtime: %d\n", value);

    return 0;
}
MSH_CMD_EXPORT(freq, show freq info);

int list_csr(void)
{
    uint32_t value = read_csr(mcause);
    rt_kprintf("mcause: 0x%08x\n");
    return 0;
}
MSH_CMD_EXPORT(list_csr, show CSR reg);

void rt_hw_board_init(void)
{
    /* Init FPIOA */
    fpioa_init();
    /* Dmac init */
    dmac_init();

    /* initalize interrupt */
    rt_hw_interrupt_init();
    /* initialize hardware interrupt */
    rt_hw_uart_init();
    rt_hw_tick_init();

#ifdef RT_USING_CONSOLE
    /* set console device */
    rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
#endif /* RT_USING_CONSOLE */

#ifdef RT_USING_HEAP
    rt_kprintf("heap: [0x%08x - 0x%08x]\n", (rt_ubase_t) RT_HW_HEAP_BEGIN, (rt_ubase_t) RT_HW_HEAP_END);
    /* initialize memory system */
    rt_system_heap_init(RT_HW_HEAP_BEGIN, RT_HW_HEAP_END);
#endif

#ifdef RT_USING_COMPONENTS_INIT
    rt_components_board_init();
#endif
}

#ifdef RT_USING_SMP

#define mb() {asm volatile("fence" :::"memory");}
#define atomic_read(ptr) (*(volatile typeof(*(ptr))*)(ptr))
#define atomic_swap(ptr, swp) __sync_lock_test_and_set(ptr, swp)
#define atomic_set(ptr, val) (*(volatile typeof(*(ptr))*)(ptr))

static inline int rt_hw_spin_trylock(rt_hw_spinlock_t *spinlock){
		int res = atomic_swap(&spinlock->slock, -1);
			mb();
				return res;
}

void rt_hw_spin_lock(rt_hw_spinlock_t *spinlock){
	    do{
		    	    while(atomic_read(&spinlock->slock));
			        }while(rt_hw_spin_trylock(spinlock));
}

void rt_hw_spin_unlock(rt_hw_spinlock_t *spinlock){
	    mb();
	        atomic_set(&spinlock->slock, 0);
}

#endif	/* RT_USING_SMP */




